R. Gaonkar Microprocessor Architecture Programming And Applications With The 8085 Prentice Hall 2014 |link| • Verified & Newest
Ramesh Gaonkar’s Microprocessor Architecture, Programming, and Applications with the 8085
| Category | Program Example | |----------|------------------| | Data transfer | Block of memory copy (no overlap) | | Arithmetic | 16-bit addition (HL + DE → HL) | | Subtraction with borrow | 16-bit subtraction (BC - DE) | | Multiplication | By repeated addition (8-bit × 8-bit → 16-bit) | | Division | Repeated subtraction | | Logical | Bit masking / rotation to check parity | | Counter & delay | 10 ms software delay using register pairs | | BCD | Packed BCD to unpacked | | ASCII | ASCII to binary (subtract 30H) | | Stack | Reverse a string stored in memory using PUSH/POP | | Subroutine call | Factorial using recursion (avoid overflow) | | Interrupt | Simulate RST 7.5 service routine | Ramesh Gaonkar’s Microprocessor Architecture
Development of Web-based 8085 Microprocessor Simulator and its Implementation on LMS Ramesh Gaonkar’s Microprocessor Architecture