Odrive 3.6 Schematic 'link' -

text-based representation

Here’s a of the ODrive 3.6 schematic in terms of its key components and connections. Since I can’t embed images, this describes the major functional blocks as they appear in the official ODrive v3.6 hardware design.

7. Communication Interfaces

• Timers: The F405 has advanced timers (TIM1, TIM2, TIM3, TIM4, TIM8). On the schematic, you will see TIM1_CH1 routed to the gate driver for Motor 0 Phase A. This is where PWM is generated.
• ADC (Analog-to-Digital Converter): The schematic shows dedicated ADC pins reading the current sense amplifiers. For example, ADC1_IN0 reads I_M0_A. Low latency here is why the ODrive can do 100,000+ loop cycles per second.
• Communication: PA9 and PA10 are USART1 (UART header). PA11 and PA12 are USB DM/DP. The schematic also pulls out PB12 and PB13 for SPI (for absolute encoders like AS5047P).

3. The Power Stage (Gate Drivers & MOSFETs)

1. Power Input & Conditioning (8V–56V DC input)
2. Gate Drivers & MOSFET Bridges (Three-phase for Motor A and Motor B)
3. Current Sensing (Low-side shunt resistors & op-amps)
4. Microcontroller Core (STM32F405RGT6)
5. Encoder & Hall Sensor Interfaces (For position feedback)
6. Auxiliary I/O & Communication (UART, USB, GPIO, Step/Dir)

2. Gate Drivers